AI infrastructure has become the single largest capex line item in the global economy. Microsoft, Amazon, Alphabet, and Meta plan a combined 725 billion dollars of capex in 2026, up 77 percent from a record 410 billion in 2025, with roughly 75 percent (~450 billion) directed at AI infrastructure (Tom's Hardware citing analyst figures; CNBC February 6, 2026; Statista). NVIDIA Q4 fiscal 2026 (ending January 25, 2026) reported 68.1 billion in revenue, with data center revenue alone of 62.3 billion (up 75 percent year over year) and full-year fiscal 2026 data center revenue of 197.3 billion versus 115.2 billion the prior year (NVIDIA Q4 FY26 release). All four hyperscalers report being supply-constrained, not demand-constrained.

The investible structure splits into five layers: the merchant GPU duopoly (NVIDIA dominant, AMD ramping), the foundry oligopoly (TSMC dominant, Samsung struggling at advanced nodes, Intel Foundry re-emerging), the HBM memory triopoly (SK Hynix leading, Micron rising, Samsung lagging), the lithography monopoly (ASML), and the custom ASIC design layer (Broadcom plus Marvell) that builds the hyperscalers' internal alternatives to NVIDIA. Custom silicon shipments are projected to grow 45 percent in 2026 versus 16 percent for merchant GPUs (Broadcom and Marvell coverage via heygotrade and trefis), meaning the ASIC layer is taking share inside the larger pie. The compute supercycle is the structural story. The competitive question is which layer captures the value as the spend keeps expanding.

The investible sector sorts into six layers, each with different economics.

1. Merchant accelerators. NVIDIA is the runaway leader: Q4 FY26 data center 62.3 billion (+75 percent), Blackwell in volume production since Q3 FY26, Rubin platform upcoming. AMD Instinct revenue is ramping (MI350 launched 2025; MI400 in 2026 with 432 GB HBM4); AMD targets data center 60-plus percent annual growth and tens of billions in AI revenue by FY27. AMD is projected to take 12 to 15 percent of AI accelerator share by Q4 2026 (Tech Insider).

2. Custom AI silicon designers. Broadcom is the dominant design partner (Google TPU, OpenAI custom chip, Meta MTIA), with ~70 percent of custom ASIC design and a guided 60 to 90 billion serviceable AI opportunity from three hyperscalers by FY27. Marvell is the second-source design partner (AWS Trainium, Microsoft Maia, Meta DPU, Google Axion ARM CPU). Custom silicon volume growing 45 percent in 2026 (heygotrade; The Next Platform).

3. Hyperscaler internal silicon. Google TPU v7 'Ironwood' (November 2025) is the most mature internal stack; Anthropic up to 1 million TPU commitment. AWS Trainium2 has 500,000-plus chips deployed. Microsoft Maia is still internal-only; Maia 3 will tape out at Intel Foundry on 18A. Meta MTIA continues with Broadcom. OpenAI is building custom silicon with Broadcom. These programs reduce hyperscaler dependence on NVIDIA but require multi-year ramp.

4. Foundries. TSMC dominates leading-edge logic: N2 in HVM Q4 FY25, N2 capacity ramping to 100,000 wafers per month by end 2026, A16 in 2H 2026. Samsung Foundry lags at advanced nodes for AI silicon. Intel Foundry 18A wins (Microsoft Maia 3 'Griffin'); Google and Apple are in discussion. SMIC is stuck at 7 nanometer (Council on Foreign Relations).

5. HBM and memory. SK Hynix leads (57 to 62 percent HBM share through 2025), reached HBM4 development completion. Micron gained share (21 percent Q2 2025) shipping HBM3E and sampling HBM4 at 11 Gbps. Samsung struggled with HBM3E qualification, lost share from 41 percent (Q2 2024) to 17 percent (Q2 2025), partly recovered to 22 percent (Q3 2025). UBS projects SK Hynix at ~70 percent share of HBM4 for NVIDIA's Rubin platform.

6. Equipment. ASML holds the EUV lithography monopoly: 60-plus EUV scanners planned 2026, 10 High-NA EUV at 380 million each, Intel 14A node a key customer for High-NA. Applied Materials, Lam Research, KLA, and Tokyo Electron supply etch, deposition, and process control.

7. China alternatives (not investable for most international capital). Huawei Ascend 910B and 910C produce more than the H20 on raw compute and energy but lag on HBM bandwidth. SMIC is the captive logic supplier. Stockpiled foreign HBM remains a constraint (SemiAnalysis; CFR).

Cross-cutting framing: every layer is currently benefiting from the same demand wave. The differentiated bets are within layers (who in HBM, which custom-ASIC designer, which foundry node). The macro question of when (not whether) hyperscaler capex normalizes is the single biggest cross-layer risk.